[OE-core] [PATCH v2] binutils-2.27.inc: Fix alignment frags for aarch64
Khem Raj
raj.khem at gmail.com
Sat Dec 17 21:03:11 UTC 2016
On Fri, Dec 16, 2016 at 5:43 PM, Manjukumar Matha
<manjukumar.harthikote-matha at xilinx.com> wrote:
> There was bug with alignment frags for aarch64 in binutils. This is fixed in
> master of binutils. This patch backports the fix to binutils 2.27 version.
>
Looks fine. Thanks
> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha at xilinx.com>
> Signed-off-by: Nathan Rossi <nathan at nathanrossi.com>
> ---
> meta/recipes-devtools/binutils/binutils-2.27.inc | 1 +
> ...eration-of-alignment-frags-in-code-sectio.patch | 139 +++++++++++++++++++++
> 2 files changed, 140 insertions(+)
> create mode 100644 meta/recipes-devtools/binutils/binutils/0017-Fix-the-generation-of-alignment-frags-in-code-sectio.patch
>
> diff --git a/meta/recipes-devtools/binutils/binutils-2.27.inc b/meta/recipes-devtools/binutils/binutils-2.27.inc
> index df8864c..5a65d91 100644
> --- a/meta/recipes-devtools/binutils/binutils-2.27.inc
> +++ b/meta/recipes-devtools/binutils/binutils-2.27.inc
> @@ -37,6 +37,7 @@ SRC_URI = "\
> file://0015-binutils-mips-gas-pic-relax-linkonce.diff \
> file://0015-Refine-.cfi_sections-check-to-only-consider-compact-.patch \
> file://0016-Fix-seg-fault-in-ARM-linker-when-trying-to-parse-a-b.patch \
> + file://0017-Fix-the-generation-of-alignment-frags-in-code-sectio.patch \
> file://0001-ppc-apuinfo-for-spe-parsed-incorrectly.patch \
> "
> S = "${WORKDIR}/git"
> diff --git a/meta/recipes-devtools/binutils/binutils/0017-Fix-the-generation-of-alignment-frags-in-code-sectio.patch b/meta/recipes-devtools/binutils/binutils/0017-Fix-the-generation-of-alignment-frags-in-code-sectio.patch
> new file mode 100644
> index 0000000..f8b46be
> --- /dev/null
> +++ b/meta/recipes-devtools/binutils/binutils/0017-Fix-the-generation-of-alignment-frags-in-code-sectio.patch
> @@ -0,0 +1,139 @@
> +From 4a4286465b5d6c28968bc2b29ae08daca7f219a3 Mon Sep 17 00:00:00 2001
> +From: Nick Clifton <nickc at redhat.com>
> +Date: Fri, 18 Nov 2016 11:42:48 -0800
> +Subject: [PATCH] Fix the generation of alignment frags in code sections for AArch64.
> +
> +PR gas/20364
> +* config/tc-aarch64.c (s_ltorg): Change the mapping state after
> +aligning the frag.
> +(aarch64_init): Treat rs_align frags in code sections as
> +containing code, not data.
> +* testsuite/gas/aarch64/pr20364.s: New test.
> +* testsuite/gas/aarch64/pr20364.d: New test driver.
> +
> +Backporting the patch from binutils mainline
> +https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=7ea12e5c3ad54da440c08f32da09534e63e515ca
> +
> +Upstream-Status: Backport
> +
> +Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha at xilinx.com>
> +---
> + gas/ChangeLog | 10 ++++++++++
> + gas/config/tc-aarch64.c | 10 +++++++---
> + gas/testsuite/gas/aarch64/pr20364.d | 13 +++++++++++++
> + gas/testsuite/gas/aarch64/pr20364.s | 28 ++++++++++++++++++++++++++++
> + 4 files changed, 58 insertions(+), 3 deletions(-)
> + create mode 100644 gas/testsuite/gas/aarch64/pr20364.d
> + create mode 100644 gas/testsuite/gas/aarch64/pr20364.s
> +
> +diff --git a/gas/ChangeLog b/gas/ChangeLog
> +index a39895a..fad06dc 100644
> +--- a/gas/ChangeLog
> ++++ b/gas/ChangeLog
> +@@ -1,3 +1,13 @@
> ++2016-08-05 Nick Clifton <nickc at redhat.com>
> ++
> ++ PR gas/20364
> ++ * config/tc-aarch64.c (s_ltorg): Change the mapping state after
> ++ aligning the frag.
> ++ (aarch64_init): Treat rs_align frags in code sections as
> ++ containing code, not data.
> ++ * testsuite/gas/aarch64/pr20364.s: New test.
> ++ * testsuite/gas/aarch64/pr20364.d: New test driver.
> ++
> + 2016-08-03 Tristan Gingold <gingold at adacore.com>
> +
> + * configure: Regenerate.
> +diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
> +index ddc40f2..74933cb 100644
> +--- a/gas/config/tc-aarch64.c
> ++++ b/gas/config/tc-aarch64.c
> +@@ -1736,13 +1736,13 @@ s_ltorg (int ignored ATTRIBUTE_UNUSED)
> + if (pool == NULL || pool->symbol == NULL || pool->next_free_entry == 0)
> + continue;
> +
> +- mapping_state (MAP_DATA);
> +-
> + /* Align pool as you have word accesses.
> + Only make a frag if we have to. */
> + if (!need_pass_2)
> + frag_align (align, 0, 0);
> +
> ++ mapping_state (MAP_DATA);
> ++
> + record_alignment (now_seg, align);
> +
> + sprintf (sym_name, "$$lit_\002%x", pool->id);
> +@@ -6373,11 +6373,15 @@ aarch64_init_frag (fragS * fragP, int max_chars)
> +
> + switch (fragP->fr_type)
> + {
> +- case rs_align:
> + case rs_align_test:
> + case rs_fill:
> + mapping_state_2 (MAP_DATA, max_chars);
> + break;
> ++ case rs_align:
> ++ /* PR 20364: We can get alignment frags in code sections,
> ++ so do not just assume that we should use the MAP_DATA state. */
> ++ mapping_state_2 (subseg_text_p (now_seg) ? MAP_INSN : MAP_DATA, max_chars);
> ++ break;
> + case rs_align_code:
> + mapping_state_2 (MAP_INSN, max_chars);
> + break;
> +diff --git a/gas/testsuite/gas/aarch64/pr20364.d b/gas/testsuite/gas/aarch64/pr20364.d
> +new file mode 100644
> +index 0000000..babcff1
> +--- /dev/null
> ++++ b/gas/testsuite/gas/aarch64/pr20364.d
> +@@ -0,0 +1,13 @@
> ++# Check that ".align <size>, <fill>" does not set the mapping state to DATA, causing unnecessary frag generation.
> ++#name: PR20364
> ++#objdump: -d
> ++
> ++.*: file format .*
> ++
> ++Disassembly of section \.vectors:
> ++
> ++0+000 <.*>:
> ++ 0: d2800000 mov x0, #0x0 // #0
> ++ 4: 94000000 bl 0 <plat_report_exception>
> ++ 8: 17fffffe b 0 <bl1_exceptions>
> ++
> +diff --git a/gas/testsuite/gas/aarch64/pr20364.s b/gas/testsuite/gas/aarch64/pr20364.s
> +new file mode 100644
> +index 0000000..594ad7c
> +--- /dev/null
> ++++ b/gas/testsuite/gas/aarch64/pr20364.s
> +@@ -0,0 +1,28 @@
> ++ .macro vector_base label
> ++ .section .vectors, "ax"
> ++ .align 11, 0
> ++ \label:
> ++ .endm
> ++
> ++ .macro vector_entry label
> ++ .section .vectors, "ax"
> ++ .align 7, 0
> ++ \label:
> ++ .endm
> ++
> ++ .macro check_vector_size since
> ++ .if (. - \since) > (32 * 4)
> ++ .error "Vector exceeds 32 instructions"
> ++ .endif
> ++ .endm
> ++
> ++ .globl bl1_exceptions
> ++
> ++vector_base bl1_exceptions
> ++
> ++vector_entry SynchronousExceptionSP0
> ++ mov x0, #0x0
> ++ bl plat_report_exception
> ++ b SynchronousExceptionSP0
> ++ check_vector_size SynchronousExceptionSP0
> ++
> +--
> +2.7.4
> +
> --
> 2.7.4
>
> --
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