[OE-core] [PATCH 3/3] meson: Add risc-v to known architectures
Khem Raj
raj.khem at gmail.com
Sun Jul 15 19:44:04 UTC 2018
Signed-off-by: Khem Raj <raj.khem at gmail.com>
---
meta/recipes-devtools/meson/meson.inc | 1 +
...nbuild-Recognise-risc-v-architecture.patch | 27 +++++++++++++++++++
2 files changed, 28 insertions(+)
create mode 100644 meta/recipes-devtools/meson/meson/0001-mesonbuild-Recognise-risc-v-architecture.patch
diff --git a/meta/recipes-devtools/meson/meson.inc b/meta/recipes-devtools/meson/meson.inc
index b278d33b72..a650469e93 100644
--- a/meta/recipes-devtools/meson/meson.inc
+++ b/meta/recipes-devtools/meson/meson.inc
@@ -12,6 +12,7 @@ SRC_URI = "https://github.com/mesonbuild/meson/releases/download/${PV}/meson-${P
file://0004-Prettifying-some-output-with-pathlib.patch \
file://0005-Set-the-meson-command-to-use-when-we-know-what-it-is.patch \
file://validate-cpu.patch \
+ file://0001-mesonbuild-Recognise-risc-v-architecture.patch \
"
SRC_URI[md5sum] = "1698f6526574839de5dcdc45e3f7d582"
diff --git a/meta/recipes-devtools/meson/meson/0001-mesonbuild-Recognise-risc-v-architecture.patch b/meta/recipes-devtools/meson/meson/0001-mesonbuild-Recognise-risc-v-architecture.patch
new file mode 100644
index 0000000000..5abf3642f3
--- /dev/null
+++ b/meta/recipes-devtools/meson/meson/0001-mesonbuild-Recognise-risc-v-architecture.patch
@@ -0,0 +1,27 @@
+From 85bb96909d2024769d8e758538a7e8e2004dbb4d Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem at gmail.com>
+Date: Sat, 14 Jul 2018 13:03:39 -0700
+Subject: [PATCH] mesonbuild: Recognise risc-v architecture
+
+Upstream-Status: Submitted [https://github.com/mesonbuild/meson/pull/3889]
+Signed-off-by: Khem Raj <raj.khem at gmail.com>
+---
+ mesonbuild/environment.py | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/mesonbuild/environment.py b/mesonbuild/environment.py
+index a0580a21..b2041424 100644
+--- a/mesonbuild/environment.py
++++ b/mesonbuild/environment.py
+@@ -83,6 +83,8 @@ known_cpu_families = (
+ 'ppc',
+ 'ppc64',
+ 'ppc64le',
++ 'riscv32',
++ 'riscv64',
+ 'sparc64',
+ 'x86',
+ 'x86_64'
+--
+2.18.0
+
--
2.18.0
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